RN=0, RI=0, CMPE=0, RIE=0
Voltage Monitor 2 Circuit Control Register 0
RIE | Voltage Monitor 2 Interrupt/Reset Enable 0 (0): Disabled 1 (1): Enabled |
Reserved | This bit is read as 0. The write value should be 0. |
CMPE | Voltage Monitor 2 Circuit Comparison Result Output Enable 0 (0): Voltage monitor 2 circuit comparison result output disabled. 1 (1): Voltage monitor 2 circuit comparison result output enabled. |
Reserved | These bits are read as 000. The write value should be 000. |
RI | Voltage Monitor 2 Circuit Mode Select 0 (0): Voltage monitor 2 interrupt during Vdet2 passage 1 (1): Voltage monitor 2 reset enabled when the voltage falls to and below Vdet2 |
RN | Voltage Monitor 2 Reset Negate Select 0 (0): Negation follows a stabilization time (tLVD2) after VCC > Vdet2 is detected. 1 (1): Negation follows a stabilization time (tLVD2) after assertion of the LVD2 reset. |